Building Reliable Arithmetic Multipliers Under NBTI Aging and Process Variations
Researchers have developed a new technique to combat hardware aging in arithmetic multipliers, which are crucial components in AI accelerators. The method utilizes the sign-invariance property of multiplication, applying 2s complement transformations to inputs to redistribute transistor stress and mitigate Negative Bias Temperature Instability (NBTI) aging. This approach was integrated into systolic arrays, demonstrating improved lifetime with minimal overhead in area and delay. AI
IMPACT Enhances the longevity and reliability of hardware critical for AI computations, potentially reducing maintenance costs and improving performance stability.