Within the plane, each switch is connected in full mesh using 800G 2xFR4 OSFPs in 8x100G breakout mode on the L1 layer and 400G FR4 QSFPs in 4x100G breakout mod
Google has introduced its new TPUv8t, a training-focused accelerator, alongside a novel network architecture named Virgo. This new system boasts a significant generational leap, offering up to four times the bandwidth per accelerator and a 40% reduction in latency compared to its predecessors. Virgo is designed to interconnect a massive 134,400 chips, supporting a total non-blocking bandwidth of 47 petabits per second. AI
IMPACT This advancement in TPU and network architecture could significantly boost AI training efficiency and scale for Google's internal workloads and cloud offerings.