From Full Boards to Tiny Defects: Scale-Aware Tile Inference with Topology-Aware Merging for High-Resolution PCB Defect Detection
Researchers have developed a new method for detecting defects on high-resolution printed circuit boards (PCBs) that addresses issues with scale and tile boundaries. Their approach involves training detectors on tile crops rather than full-board images to preserve detail, significantly improving detection accuracy. Additionally, a post-processing technique called Topology-Aware Tile Merging (TA-TM) was introduced to reconcile detections across tile edges, enhancing recall for small defects and overall performance without requiring retraining. AI
IMPACT This research offers a novel approach to improve automated visual inspection in manufacturing, potentially leading to more reliable quality control for electronic components.